Not Applicable
The present invention relates generally to integrated circuit packages and, more specifically, to the use of conductive lead frames for the production of integrated circuit packages.
An integrated circuit (IC) package encapsulates an IC chip (die) in a protective casing and may also provide power and signal distribution between the IC chip and an external printed circuit board (PCB). An IC package may use a metal lead frame to provide electrical paths for that distribution.
To facilitate discussion, FIG. 1 is a top view of a lead frame panel 100 made up for a plurality of lead frames that may be used in the prior art. The lead frame may comprise leads 108, die attach pads 112, ties 116 for supporting the die attach pads 112, and a skirt 120 for supporting the plurality of leads 108 and ties 116. The lead frame panel 100 may be etched or stamped from a thin sheet of metal. IC chips 124 may be mounted to the die attach pads 112 by an adhesive epoxy. Wire bonds 128, typically of fine gold wire, may then be added to electrically connect the IC chips 124 to the leads 108. Each IC chip 124 may then be encapsulated with part of the leads 108 and the die attach pad 112 in a protective casing, which may be produced by installing a preformed plastic or ceramic housing around each IC chip or by dispensing and molding a layer of encapsulation material over all IC chips 124. FIG. 2 is a cross-sectional view of part of the lead frame panel 100 and IC chips 124. In a process described in U.S. patent application Ser. No. 09/054,422, entitled xe2x80x9cLead Frame Chip Scale Packagexe2x80x9d, by Shahram Mostafazadeh et al., filed Apr. 2, 1998, a tape 136 is placed across the bottom of the lead frame panel 100 and a dam 132 is placed around the lead frame panel 100. An encapsulation material 140 is poured to fill the dam 132, encapsulating the IC chips 124, the wire bonds 128, and part of the lead frame panel 100. The tape 136 prevents the encapsulation material 140 from passing through the lead frame panel 100. Once the encapsulation material 140 is hardened, the dam 132 and tape 136 may be removed. The encapsulation material 140 may be cut to singulate the IC chips 124 and leads 108.
Even though IC packages can currently be manufactured with metal lead frames that provide for the required electrical pathways, there are continuing efforts to improve IC manufacturing techniques. Therefore, it is desirable to provide IC manufacturing techniques, which utilize metal lead frames, that are more efficient and cost-effective, and that produce IC packages having increased structurally integrity.
The present invention pertains to improved techniques for forming leadframe chip scale packages and land grid array packages. One aspect of the invention pertains to a method for patterning a conductive substrate, which is utilized to form a packaged semiconductor device, wherein a metallic barrier layer and a second metallic layer are utilized as an etching resist. A method, according to another aspect of the invention pertains to covering a metallic barrier layer and second metallic layer with a etch resistant cap such that the etch resistant cap is used as a etching resist.
In another aspect of the present invention, a method for treating a conductive leadframe with a CZ treatment is disclosed. The CZ treatment provides the conductive leadframe with an improved surface finish that is more adhesive for bonding with molding materials.
In yet another aspect of the present invention, techniques relating to locking grooves within the studs of a studded leadframe are disclosed. The locking grooves allow the studs to form stronger bonds with molding materials used in semiconductor packaging.
These and other features and advantages of the present invention will be presented in more detail in the following specification of the invention and the accompanying figures, which illustrate by way of example the principles of the invention.